1. Field of the Invention
The present invention relates, in general, to semiconductor device manufacturing and packaging methods and, in particular, to methods for thinning semiconductor wafers.
2. Description of the Related Art
Semiconductor devices, such as integrated circuits, are typically manufactured in and on a semiconductor substrate (e.g., a semiconductor wafer). The thickness of semiconductor wafers is predetermined, based on the semiconductor wafer""s diameter, to avoid breakage and/or warpage during manufacturing. For example, the thickness of a 150 mm diameter silicon semiconductor wafer is approximately 650 microns, while that of a 200 mm diameter silicon semiconductor wafer is approximately 725 microns.
Following their manufacture, individual semiconductor devices (i.e., die) are packaged in order to provide electrical connections to an external system and protection from deleterious environmental factors (e.g., moisture). To facilitate the use of uniformly sized packages and to reduce substrate resistance, semiconductor wafers are usually thinned prior to packaging of the individual semiconductor devices. Semiconductor wafers are also thinned in order to minimize the effects of thermal coefficient of expansion mismatch between an individual semiconductor device and a package. Such thinning is referred to as xe2x80x9cbackgrinding,xe2x80x9d since it is conventionally accomplished by mechanically grinding the lower surface (i.e., back) of the semiconductor wafer. The backgrinding process employs methods to protect semiconductor devices on the upper surface (i.e., front) of the semiconductor wafer and to securely hold the semiconductor wafer. A conventional method of protection is the application of a protective tape over the upper surface.
Following the backgrinding process, the semiconductor device is packaged and electrically connected to an external system. For example, in xe2x80x9cflip chipxe2x80x9d packaging processes, bond pads (for the provision of input signals, output signals, supply voltage and ground) on a semiconductor device are directly connected to package or circuit board bond pads via bumps (e.g., solder bumps) formed on the bond pads. During such a flip chip packaging process, a semiconductor device with attached solder bumps is flipped over and aligned with package or circuit board bond pads. The solder bumps are then subjected to reflow processing in order to attach the bond pads of the semiconductor device to the package or circuit board bond pads.
A drawback of employing bumps, however, is that the bumps produce points of high localized stress in the semiconductor wafer during the backgrinding processes. These high localized stress points can cause some semiconductor wafers to break during the backgrinding process, even in the presence of a protective tape covering the bumps and upper surface of the semiconductor wafers. If the semiconductor wafers are subjected to a backgrinding process prior to the formation of the bumps, the bump formation process can impose a significant risk of breakage to the thinned semiconductor wafers.
Still needed in the field, therefore, is a method of thinning a semiconductor substrate (e.g., a semiconductor wafer) that does not impose a significant risk of breakage on the semiconductor substrate. In addition, the method should be compatible with semiconductor wafers that have bumps on their upper surface.
The present invention provides methods for thinning a semiconductor substrate that do not impose a significant risk of breakage on the semiconductor substrate and are compatible with semiconductor wafers having conventional electrically active bumps thereon. A process according to one exemplary embodiment of the present invention includes first forming at least one dummy bump on a semiconductor substrate (e.g., a silicon semiconductor wafer with electrically active bumps formed thereon). The dummy bumps are arranged on the semiconductor substrate (e.g., along its perimeter) in a manner that reduces a risk of establishing localized stress therein that is sufficient to result in breakage of the semiconductor substrate during a subsequent thinning step. The semiconductor substrate is subsequently thinned using, for example, a mechanical backgrinding process.
Localized stress within a semiconductor wafer with electrically active bumps formed thereon is enhanced when a significant portion of the semiconductor wafer (e.g., a portion from which the manufacturing of complete semiconductor devices has been excluded) remains free of such electrically active bumps. The formation of dummy bumps in that portion precludes such stress enhancement and consequently reduces a risk of semiconductor wafer breakage during mechanical backgrinding.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the invention are utilized, and the accompanying drawings.